https://cppcon.org/ https://github.com/CppCon/CppCon2020 --- SIMD capabilities are virtually ubiquitous in modern computing hardware, and yet much of that computing capacity often goes unused. This talk will provide a high-level overview of the SSE, AVX, and AVX-512 instruction set architecture provided by Intel microprocessors, and provide some specific examples of real-world problems where additional performance can be gained by thinking "vertically".
We'll begin with a quick, high-level description of the features provided by the SSE, AVX, and AVX-512 instruction sets. We'll then use C++ to compose a simple API employing various compiler intrinsics implementing those instruction sets. At the lowest level, the API will wrap some primitive operations, and then build some very useful basic operations (like multi-register shift) upon those primitives. We'll then build some facilities for comparison and arithmetic, and finally round out the API with functions for load and store. During all of this, we'll use C++ to provide type safety, reduce complexity, and maximize performance.
Next, we'll take a look at how this simple API can be used to improve performance for a handful of interesting problems, like sorting the values stored in a register to create a very fast 1-D median filter, or high-speed convolution and correlation with kernels that fit within a single register. Finally, we'll revisit the UTF-8 to UTF-32 conversion techniques presented at CppCon two years ago to see whether using AVX can make an already fast conversion algorithm even faster.
--- Bob Steagall KEWB Computing Chief Cook and Bottle Washer Maryland
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